/* 
 * File:   newmain.c
 * Author: Anton_Jatmiko
 *
 * Created on 23 November 2013, 14:09
 */




#include <stdio.h>
#include <stdlib.h>
#include <xc.h>
#include "types.h"
#include "FlashM.h"

//#include <pic18f46j50.h>


// PIC18F46J50 Configuration Bit Settings
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

// CONFIG1L
#pragma config WDTEN = OFF      // Watchdog Timer (Disabled - Controlled by SWDTEN bit)
#pragma config PLLDIV = 1       // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config STVREN = ON      // Stack Overflow/Underflow Reset (Enabled)
#pragma config XINST = OFF      // Extended Instruction Set (Disabled)

// CONFIG1H
#pragma config CPUDIV = OSC1    // CPU System Clock Postscaler (No CPU system clock divide)
#pragma config CP0 = OFF        // Code Protect (Program memory is not code-protected)

// CONFIG2L
#pragma config OSC = HS         // Oscillator (HS, USB-HS)
#pragma config T1DIG = ON       // T1OSCEN Enforcement (Secondary Oscillator clock source may be selected)
#pragma config LPT1OSC = OFF    // Low-Power Timer1 Oscillator (High-power operation)
#pragma config FCMEN = ON       // Fail-Safe Clock Monitor (Enabled)
#pragma config IESO = ON        // Internal External Oscillator Switch Over Mode (Enabled)

// CONFIG2H
#pragma config WDTPS = 32768    // Watchdog Postscaler (1:32768)

// CONFIG3L
#pragma config DSWDTOSC = INTOSCREF// DSWDT Clock Select (DSWDT uses INTRC)
#pragma config RTCOSC = T1OSCREF// RTCC Clock Select (RTCC uses T1OSC/T1CKI)
#pragma config DSBOREN = ON     // Deep Sleep BOR (Enabled)
#pragma config DSWDTEN = ON     // Deep Sleep Watchdog Timer (Enabled)
#pragma config DSWDTPS = G2     // Deep Sleep Watchdog Postscaler (1:2,147,483,648 (25.7 days))

// CONFIG3H
#pragma config IOL1WAY = ON     // IOLOCK One-Way Set Enable bit (The IOLOCK bit (PPSCON<0>) can be set once)
#pragma config MSSP7B_EN = MSK7 // MSSP address masking (7 Bit address masking mode)

// CONFIG4L
#pragma config WPFP = PAGE_63   // Write/Erase Protect Page Start/End Location (Write Protect Program Flash Page 63)
#pragma config WPEND = PAGE_WPFP// Write/Erase Protect Region Select (valid when WPDIS = 0) (Page WPFP<5:0> through Configuration Words erase/write protected)
#pragma config WPCFG = OFF      // Write/Erase Protect Configuration Region (Configuration Words page not erase/write-protected)

// CONFIG4H
#pragma config WPDIS = OFF      // Write Protect Disable bit (WPFP<5:0>/WPEND region ignored)

UINT16 CounterMs = 0;

void interrupt myISR(void)
{
    if (PIE1bits.TMR2IE && PIR1bits.TMR2IF)
    {
        ++CounterMs;
        if (CounterMs == 500)
        {
            PORTBbits.RB4 = !PORTBbits.RB4;
            CounterMs = 0;
        }

        PIR1bits.TMR2IF = 0;
    }
}

/*
 * 
 */
void main(void)
{
    UINT32 startAddr = 0x18;
    UINT16 dataNew[32];
    TUINT16 dataRead1;
    int counter;
    //TUINT16 dataRead2[512];

    TRISBbits.TRISB4 = 0;

    INTCONbits.GIE = 1;
    INTCONbits.PEIE = 1;
    IPR1bits.TMR2IP = 1;
    PIE1bits.TMR2IE = 1;
    PIR1bits.TMR2IF = 0;

    PR2bits.PR2 = 149;
    TMR2bits.TMR2 = 0;

    T2CONbits.T2CKPS = 1;
    T2CONbits.T2OUTPS = 4;

    T2CONbits.TMR2ON = 1;

    for (counter = 0; counter <32; counter++)
    {
        dataNew[counter] = 2 * counter;
    }

//    dataRead1.l = dataRead2.l = 0;
//    (void) FlashM_Read16(0x18, &(dataRead1.s.Hi), &(dataRead1.s.Lo));
    //FlashM_Erase(0x01F0);
    //(void) FlashM_Write64(0x01F0, &(dataNew[0]));

//    for (int i = 0; i < 10; i++)
//    {
//        int addressRead = 100 + 2*i;
//        (void) FlashM_Read16(addressRead, &(dataRead1.s.Hi), &(dataRead1.s.Lo));
//    }


    for (counter = 0; counter < 1000; counter++);

    // erase
//    TBLPTR = 0x400;
////    TBLPTRU = 0;
////    TBLPTRH = 0x00;
////    TBLPTRL = 0x5A;
//    EECON1bits.WREN = 1;
//    EECON1bits.FREE = 1;
//    INTCONbits.GIE = 0;
//    EECON2 = 0x55;
//    EECON2 = 0xAA;
//    EECON1bits.WR = 1;
//
//    //while(++i < 5000);
//    asm("nop");
//    asm("nop");
//    while (EECON1bits.WR);
//    INTCONbits.GIE = 1;
//
//    //write 2
//    TBLPTR = 0x3E0;
//
//
//
//    TABLAT = 0x12;
//    asm("TBLWT*+");
//    TABLAT = 0xA0;
//    asm("TBLWT*+");
//
//    TBLPTR = 0x3E0;
//    EECON1bits.WPROG = 1;
//    EECON1bits.WREN = 1;
//    INTCONbits.GIE = 0;
//    EECON2 = 0x55;
//    EECON2 = 0xAA;
//    EECON1bits.WR = 1;
//    NOP();
//    NOP();
//    //INTCONbits.GIE = 1;
//    EECON1bits.WPROG = 0;
//    EECON1bits.WREN = 0;

    // read
    TBLPTR = 0x3E0;
    asm("TBLRD*+");
    dataRead1.s.Lo = TABLAT;
    //TBLPTR++;
    asm("TBLRD*+");
    dataRead1.s.Hi = TABLAT;

    asm("TBLRD*+");
    dataRead1.s.Lo = TABLAT;
    asm("TBLRD*+");
    dataRead1.s.Hi = TABLAT;

    asm("TBLRD*+");
    dataRead1.s.Lo = TABLAT;
    asm("TBLRD*+");
    dataRead1.s.Hi = TABLAT;

    asm("TBLRD*+");
    dataRead1.s.Lo = TABLAT;
    asm("TBLRD*+");
    dataRead1.s.Hi = TABLAT;


    for(;;)
    {
    }

}

